MIPI is representing “Mobile Industry Processor Interface” and “Camera Serial Interface 2” for CSI-2
Looking into the physical layer, we can have several serial interfaces for receiver I/O (but I’m not sure how many up to). From the device point of view, the CSI-2 interfacde comprises six differential input signals representing three lanes (serial clock and one or two serial data like DN, DP).
Merge the incoming serial stream into a byte stream and the order of the lanes at the CSI-2 receiver core depends on the lane configuration.
The lane merger can merge tow lanes into a single byte stream, and the number of lanes and their configuration can be changed only in ULPM or whe all data lanes are in off mode. The byte stream always starts from lane 1.
<ST><SP><ET>[ULPM]<ST><PH| DATA |PF><ET>[ULPM]<ST><PH| DATA |PH><ET>
ST : Start of Transmission
ET : End of Transmission
PH : Packet Header
PF : Packet Footer
ULPM : Ultra-Low Power Mode
<SP> : Short Packet
<PH| DATA |PF> : Long Packet
A short packet is identified by data types 0x00-0x0F, and can be used for frame or line sync also. 32 bit Short packet structure is like following
[Data ID | Short packet data filed | ECC] : 32bit
A long packet is identified by data types 0x10-0x37
32bit Packet Header (PH), Packet data, 16bit Packet fotter (PF)
[DATA ID(8bit) | Word count (WC 16bit) | ECC (8bit)] [data0 (8bit) |…| data WC-1] [Checksum (16bit)]
Synchronization code value between 0x8-0xF.
Not processed by camera H/W, and stored in a register without the ECC.
Must be handled by S/W
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Tag : Camera interface, CSI-2, MIPI
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